1. Technical Field
Example embodiments relate to semiconductor devices, more particularly to a memory system capable of reducing coupling effect between memory cells.
2. Description of the Related Art
In general, a non-volatile semiconductor memory device such as a flash memory device includes a memory cell array which have erased or programmed memory cells. The memory cells of the memory cell array have threshold voltage distributions corresponding to data stored in the memory cells. In general, the flash memory device may include single level cells (SLC), where each memory cell stores a single bit of data. Other flash memories may store multiple bits of data in each memory cell, these memory cells (and memories) are often referred to as multi-level cells (MLC). In general, each of the multi-level cells is capable of storing two or more bits of data. Regarding a multi-level cell which stores N bits, the multi-level cell may have a threshold voltage which corresponds to a distribution (or threshold range) among the 2^N possible distributions of threshold voltages (or threshold ranges). The threshold voltage of the memory cell represents the data stored therein.
As the distance between memory cells becomes smaller according to advances in manufacturing technology of semiconductor devices, a coupling effect between nearby memory cells may affect the actual and/or apparent threshold voltage of a nearby cell. Strong coupling effect may alter an actual or apparent threshold voltage of a memory cell such that data of the cell intended to be stored within one threshold distribution (or within one range) may be detected as a threshold value within another threshold distribution, and thus read out of the memory as different data. Thus, the reliability of data stored in a memory device which is affected by such coupling effect may be reduced because of the shifted threshold voltages. Further, and such reliability problem may become more significant when the number of bits to be stored in a memory cell is increased.